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october 2009 doc id 16264 rev 1 1/26 26 TDA7492MV 50 w mono btl class-d audio amplifier features ? 50 w continuous output power: r l = 6 ? , thd = 10% at v cc = 25 v ? 40 w continuous output power: r l = 8 ? , thd = 10% at v cc = 25 v ? wide range single supply operation (10 - 26 v) ? high efficiency ( = 90%) ? four selectable, fixed gain settings of nominally 21.6 db, 27.6 db, 31.1 db and 33.6 db ? differential inputs mi nimize common-mode noise ? standby and mute features ? short-circuit protection ? thermal-overload protection ? externally synchronizable description the TDA7492MV is a mono btl class-d audio amplifier with single power supply designed for home systems and docking stations. thanks to the high efficiency and an exposed-pad-down (epd) package no heatsink is required. powersso-36 with exposed pad down table 1. device summary order code operating temp. range package packaging TDA7492MV 0 to 70 c powersso-36 epd tube TDA7492MV13tr 0 to 70 c powersso-36 epd tape and reel www.st.com
contents TDA7492MV 2/26 doc id 16264 rev 1 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 for 6- ? load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 for 8- ? load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.2 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.3 gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.4 input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.5 internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.1 master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.2 slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.6 output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.7 protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.8 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
TDA7492MV list of tables doc id 16264 rev 1 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. powersso-36 epd dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 7. mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 8. gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 9. how to set up synclk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures TDA7492MV 4/26 doc id 16264 rev 1 list of figures figure 1. internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin connection (top view, pcb view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. thd vs output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. thd vs output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. thd vs frequency (100 mw) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. thd vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. fft (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. fft (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. thd vs output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. thd vs output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. thd vs frequency (100 mw) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. thd vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 16. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. fft (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 18. fft (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 19. test board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. powersso-36 epd outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 21. applications circuit for class-d amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. turn-on/off sequence for minimizing speaker ?pop? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 25. master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. typical lc filter for a 8- ? speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. typical lc filter for a 4- ? speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 28. behavior of pin diag for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
TDA7492MV device block diagram doc id 16264 rev 1 5/26 1 device block diagram figure 1 shows the block diagram of the TDA7492MV. figure 1. internal block diagram
pin description TDA7492MV 6/26 doc id 16264 rev 1 2 pin description 2.1 pin out figure 2. pin connection (top view, pcb view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 sub_gnd nc nc nc nc nc nc nc nc outn outn pvcc pvcc pgnd pgnd outp outp pgnd vss svcc vref sgnd2 vdds2 gain1 gain0 diag sgnd vdds synclk rosc inn inp mute stby vddpw svr ep, exposed pad down connect to ground
TDA7492MV pin description doc id 16264 rev 1 7/26 2.2 pin list table 2. pin description list number name type description 1 sub_gnd power connect to the frame 2,3 nc - no internal connection 4,5 nc - no internal connection 6,7 nc - no internal connection 8,9 nc - no internal connection 10,11 outn out negative pwm output 12,13 pvcc power power supply for output channel 14,15 pgnd power power ground for output channel 16,17 outp out positive pwm output 18 pgnd power power supply ground 19 vddpw out 3.3-v (nominal) regulator output referred to ground for power stage 20 stby input standby mode control 21 mute input mute mode control 22 inp input positive differential input 23 inn input negative differential input 24 rosc out master oscillator frequency-setting pin 25 synclck in/out clock in/out for external oscillator 26 vdds out 3.3-v (nominal) regulator output referred to ground for signal blocks 27 sgnd power signal ground 28 diag out open-drain diagnostic output 29 svr out supply voltage rejection 30 gain0 input gain setting input 1 31 gain1 input gain setting input 2 32 vdds2 input to be connected to vdds (pin 26) 33 sgnd2 input to be connected to sgnd (pin 27) 34 vref out half vdds (nominal) referred to ground 35 svcc power signal power supply 36 vss out 3.3-v (nominal) regulator output referred to power supply -ep - exposed pad for ground-plane heatsink, to be connected to ground
electrical specifications TDA7492MV 8/26 doc id 16264 rev 1 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data 3.3 electrical specifications unless otherwise stat ed, the results in ta bl e 5 below are given for the conditions: v cc =25v, r l (load) = 8 ? , r osc = r3 = 39 k ? , c8 = 100 nf, f = 1 khz, g v = 21.6 db and tamb = 25 c. table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage for pins pvcc, svcc 30 v v i voltage limits for input pins stby, mute, inn, inp, gain0, gain1 -0.3 - 3.6 v t op operating temperature 0 to 70 c t j junction temperature -40 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance, junction to case - 2 3 c/w table 5. electrical specifications symbol parameter condition min typ max unit v cc supply voltage for pins pvcca, pvccb, svcc -10-26v i q total quiescent current without lc - 26 35 ma i qstby quiescent current in standby - - 2.5 5.0 a v os output offset voltage play mode -100 - 100 mv mute mode -60 - 60 i ocp overcurrent protection threshold r l = 0 ? 4.8 6.0 - a t j junction temperature at thermal shutdown - - 150 - c r i input resistance differential input 48 60 - k ? v ovp overvoltage protection threshold - 28 29 - v
TDA7492MV electrical specifications doc id 16264 rev 1 9/26 v uvp undervoltage protection threshold - --7v r dson power transistor on resistance high side - 0.2 - ? low side - 0.2 - p o output power thd = 10% - 40 - w thd = 1% - 32 - p o output power r l = 6 ? , thd = 10%, v cc = 25v -50- w r l = 6 ? , thd = 1% v cc = 25v -40- p d dissipated power p o =40w, thd = 10% - 4.0 - w efficiency p o = 40 w 8090- % thd total harmonic distortion p o = 1 w - 0.1 0.4 % g v closed-loop gain gain0 = l, gain1 = l 20.6 21.6 22.6 db gain0 = l, gain1 = h 26.6 27.6 28.6 gain0 = h, gain1 = l 30.1 31.1 32.1 gain0 = h, gain1 = h 32.6 33.6 34.6 ? g v gain matching - -1 - 1 db en total input noise a curve, g v = 20 db - 20 - v f = 22 hz to 22 khz - 25 35 svrr supply voltage rejection ratio fr = 100 hz, vr = 0.5 v, c svr = 10 f 40 50 - db t r , t f rise and fall times - - 50 - ns f sw switching frequency internal oscillator 290 310 330 khz f swr output switching frequency range with internal oscillator (1) 250 - 400 khz with external oscillator (2) 250 - 400 v inh digital input high (h) - 2.3 - - v v inl digital input low (l) - - 0.8 a mute mute attenuation v mute = 1 v 60 80 - db 1. f sw = 10 6 / ((16 * r osc + 182) * 4) khz, f synclk = 2 * f sw with r3 = 39 k ? (see figure 21. ). 2. f sw = f synclk / 2 with the frequency of the external oscillator. table 5. electrical specifications (continued) symbol parameter condition min typ max unit
characterization curves TDA7492MV 10/26 doc id 16264 rev 1 4 characterization curves the following characterization curves were made using the TDA7492MV exposed-pad-down test board with v cc = 25 v, a signal frequency of 1 khz and an output power of 1 w unless otherwise specified. the lc filter for the 8- ? load uses components of 33 h and 220 nf and for the 6- ? load 22 h and 220 nf. 4.1 for 6- ? load figure 3. output power vs supply voltage figure 4. thd vs output power (1 khz) 12 16 20 24 28 32 36 40 44 48 52 15 16 17 18 19 20 21 22 23 24 25 supply voltage (v) output power (w) 12 16 20 24 28 32 36 40 44 48 52 15 16 17 18 19 20 21 22 23 24 25 supply voltage (v) output power (w) thd = 10% thd = 1% thd vs. output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 60 500m 1 2 5 10 20 thd vs. output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 60 500m 1 2 5 10 20 thd vs. output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 60 500m 1 2 5 10 20
TDA7492MV characterization curves doc id 16264 rev 1 11/26 figure 5. thd vs output power (100 hz) figure 6. thd vs frequency (100 mw) figure 7. thd vs frequency thd vs . output power 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 60 500m 1 2 5 10 20 thd (%) output power (w) thd vs . output power 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 200m 60 500m 1 2 5 10 20 thd (%) output power (w) thd (%) thd vs. f requency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd (%) thd vs. f requency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd vs . frequency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd (%) thd vs . frequency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd (%)
characterization curves TDA7492MV 12/26 doc id 16264 rev 1 figure 8. frequency response figure 9. fft (0 db) figure 10. fft (-60 db) qyp ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 10 30k 20 50 100 200 500 1k 2k 5k 10k qyp ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 10 30k 20 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (0 db) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (0 db) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (db) fft (60 db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (db) fft (60 db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k
TDA7492MV characterization curves doc id 16264 rev 1 13/26 4.2 for 8- ? load figure 11. output power vs supply voltage figure 12. thd vs output power (1 khz) 10 14 18 22 26 30 34 38 42 15 16 17 18 19 20 21 22 23 24 25 su pp l y volta g e ( v ) o utput power (w ) thd = 10% thd = 1% thd vs . output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 60 200m 500m 1 2 5 10 20 thd vs . output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 60 200m 500m 1 2 5 10 20 thd vs . output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 60 200m 500m 1 2 5 10 20
characterization curves TDA7492MV 14/26 doc id 16264 rev 1 figure 13. thd vs output power (100 hz) figure 14. thd vs frequency (100 mw) figure 15. thd vs frequency thd vs . output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 60 200m 500m 1 2 5 10 20 thd vs . output power thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 60 200m 500m 1 2 5 10 20 thd (%) thd vs. frequency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd (%) thd vs. frequency frequency (hz) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd vs . frequency frequency (hz) thd (%) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k thd vs . frequency frequency (hz) thd (%) 0.01 0.5 0.02 0.03 0.04 0.05 0.06 0.08 0.1 0.2 0.3 0.4 20 20k 50 100 200 500 1k 2k 5k 10k
TDA7492MV characterization curves doc id 16264 rev 1 15/26 figure 16. frequency response figure 17. fft (0 db) figure 18. fft (-60 db) frequency response ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 r 10 30k 20 50 100 200 500 1k 2k 5k 10k frequency response ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 r 10 30k 20 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (0 db) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (0 db) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (0 db) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (db) fft (-60 db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k frequency (hz) fft (db) fft (-60 db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k fft (db) fft (-60 db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k
characterization curves TDA7492MV 16/26 doc id 16264 rev 1 4.3 test board figure 19. test board layout
TDA7492MV package mechanical data doc id 16264 rev 1 17/26 5 package mechanical data the TDA7492MV comes in a 36-pin powersso package with exposed pad down. figure 20 below shows the package outline and ta bl e 6 gives the dimensions. figure 20. powersso-36 epd outline drawing h x 45
package mechanical data TDA7492MV 18/26 doc id 16264 rev 1 in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 6. powersso-36 epd dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.47 0.085 - 0.097 a2 2.15 - 2.40 0.085 - 0.094 a1 0.00 - 0.10 0.000 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 6.50 - 7.10 0.256 - 0.280
TDA7492MV applications information doc id 16264 rev 1 19/26 6 applications information 6.1 applications circuit figure 21. applications circuit for class-d amplifier TDA7492MV
applications information TDA7492MV 20/26 doc id 16264 rev 1 6.2 mode selection the three operating modes of the TDA7492MV are set by the two inputs stby (pin 20) and mute (pin 21). z standby mode: all circuits are turned off, very low current consumption. z mute mode: inputs are connected to ground and the positive and negative pwm outputs are at 50% duty cycle. z play mode: the amplifiers are active. the protection functions of th e TDA7492MV are realized by pullin g down the voltages of the stby and mute inputs shown in figure 22 . the input current of the corresponding pins must be limited to 200 a. figure 22. standby and mute circuits figure 23. turn-on/off sequence for minimizing speaker ?pop? table 7. mode settings mode selection stby mute standby l (1) 1. drive levels defined in table 5: electrical s pecifications on page 8 x (don?t care) mute h (1) l play h h stby mute 0 v 3.3 v c7 2.2 f r2 30 k ? standby 0 v 3.3 v c15 2.2 f r4 30 k ? mute TDA7492MV
TDA7492MV applications information doc id 16264 rev 1 21/26 6.3 gain setting the gain of the TDA7492MV is set by the two inputs, gain0 (pin 30) and gain1 (pin 31). internally, the gain is set by changing the feedback resistors of the amplifier. 6.4 input resistance and capacitance the input impedance is set by an internal resistor ri = 60 k ? (typical). an input capacitor (ci) is required to couple the ac input signal. the equivalent circuit and frequency response of the input components are shown in figure 24 . for ci = 470 nf the high-pass filter cut-off frequency is below 20 hz: fc = 1 / (2 * * ri * ci) figure 24. device input circuit and frequency response table 8. gain settings gain0 gain1 nominal gain, g v (db) ll21.6 lh27.6 hl 31.1 hh33.6 ri input ci rf input pin signal
applications information TDA7492MV 22/26 doc id 16264 rev 1 6.5 internal and external clocks the clock of the class-d amplifier can be generated internally or can be driven by an external source. if two or more class-d amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. this can be implemented by using one TDA7492MV as master clock, while the other devices are in slave mode (that is, externally clocked. the clock interconnect is via pin synclk of each device. as explained below, synclk is an output in master mode and an input in slave mode. 6.5.1 master mode (internal clock) using the internal oscillator, th e output switching frequency, f sw , is controlled by the resistor, r osc , connected to pin rosc: f sw = 10 6 / ((16 * r osc + 182) * 4) khz where r osc is in k ? . in master mode, pin synclk is used as a clock output pin, whose frequency is: f synclk = 2 * f sw for master mode to operate correctly then resistor r osc must be less than 60 k ? as given below in ta b l e 9 . 6.5.2 slave mode (external clock) in order to accept an external clock input the pin rosc must be left open, that is, floating. this forces pin synclk to be internally configured as an input as given in ta bl e 9 . the output switching frequency of the slave devices is: f sw = f synclk / 2 figure 25. master and slave connection table 9. how to set up synclk mode rosc synclk master r osc < 60 k ? output slave floating (not connected) input synclk rosc rosc cosc rosc synclk 39 k ? 100 nf output input master slave tda7492xy TDA7492MV
TDA7492MV applications information doc id 16264 rev 1 23/26 6.6 output low-pass filter to avoid emi problems, it may be necessary to use a low-pass filter before the speaker. the cutoff frequency should be larger than 22 khz and much lower than the output switching frequency. it is necessary to choose the l-c component values depending on the loud speaker impedance. some typical values, which give a cut-off frequency of 27 khz, are shown in figure 26 and figure 27 below. figure 26. typical lc filter for a 8- ? speaker figure 27. typical lc filter for a 4- ? speaker 6.7 protection function the TDA7492MV is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. overvoltage protection (ovp) if the supply voltage exceeds the value for v ovp given in table 5: electrical specifications on page 8 the overvoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage falls back to within the operating range the device restarts. undervoltage protection (uvp) if the supply voltage drops below the value for v uvp given in table 5: electrical specifications on page 8 the undervoltage protection is activated which forces the outputs to
applications information TDA7492MV 24/26 doc id 16264 rev 1 the high-impedance state. when the supply voltage recovers to within the operating range the device restarts. overcurrent protection (ocp) if the output current exceeds the value for i ocp given in table 5: electrical specifications on page 8 the overcurrent protection is activated which forces the outputs to the high-impedance state. periodically, the device attempts to restart. if the overcurrent condition is still present then the ocp remains active. the restart time, t oc , is determined by the r-c components connected to pin stby. thermal protection (otp) if the junction temperature, t j , reaches 145 c (nominal), the device goes to mute mode and the positive and negative pwm outputs are forced to 50% duty cycle. if the junction temperature exceeds the value for t j given in table 5: electrical specifications on page 8 the device shuts down and the output is forced to the high impedance state. when the device cools sufficiently the device restarts. 6.8 diagnostic output the output pin diag is an open drain transistor. when the protection is activated it is in the high-impedance state. the pin can be connected to a power supply (< 26 v) by a pull-up resistor whose value is limited by the maximum sinking current (200 a) of the pin. figure 28. behavior of pin diag for various protection conditions TDA7492MV protection logic r1 diag vdd vdd overcurrent protection restart restart ov, uv, ot protection
TDA7492MV revision history doc id 16264 rev 1 25/26 7 revision history table 10. document revision history date revision changes 20-oct-2009 1 initial release.
TDA7492MV 26/26 doc id 16264 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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